DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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Dual D-type flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: flip-flops

Dual D-type flip-flop with set and reset; positive edge-trigger

1. General description The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive edge-trigger

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