4-LINE TO 10-LINE DECODERS (1 of 10)

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 μA Max Full Decoding of Input Logic All Outputs Are High for Invalid BCD Conditions Also for Applicat

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW