BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT423 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long pulses up

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended by retriggering (nA) or (nB). • DC triggered from active HIGH or active LOW inputs\n• Retriggerable for very long pulses up to 100 % duty factor\n• Direct reset terminates output pulse\n• Schmitt-trigger action on all inputs except for the reset input\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC423: CMOS;

Dual retriggerable monostable multivibrator with reset

The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended by retriggering (nA) or (nB). • DC triggered from active HIGH or active LOW inputs\n• Retriggerable for very long pulses up to 100 % duty factor\n• Direct reset terminates output pulse\n• Schmitt-trigger action on all inputs except for the reset input\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC423: CMOS;

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT423 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long pulses up

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT423 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long pulses up

Dual retriggerable monostable multivibrator with reset

The 74HC423-Q100 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended by retriggering (nA) or

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT423 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long pulses up

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT423 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long pulses up

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC MULTIVIBRATOR 20NS 16SO 集成电路（IC） 多谐振荡器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC MULTIVIBRATOR 20NS 16SO 集成电路（IC） 多谐振荡器

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

BCD TO DECIMAL DECODER

DESCRIPTION The M54/74HC42 is a high speed CMOS BCD-TO-DECIMAL DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MA

BCD TO DECIMAL DECODER

DESCRIPTION The M54/74HC42 is a high speed CMOS BCD-TO-DECIMAL DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MA