SNx4AHC273 Octal D-Type Flip-Flops With Clear

1 Features • Operating range 2V to 5.5V VCC • Contain eight flip-flops with single-rail outputs • Direct clear input • Individual data input to each flip-flop • Latch-up performance exceeds 250mA per JESD 17 • ESD protection exceeds JESD 22 – 2000V human-body model (A114-A) – 1000V charge

SNx4AHC273 Octal D-Type Flip-Flops With Clear

1 Features • Operating range 2V to 5.5V VCC • Contain eight flip-flops with single-rail outputs • Direct clear input • Individual data input to each flip-flop • Latch-up performance exceeds 250mA per JESD 17 • ESD protection exceeds JESD 22 – 2000V human-body model (A114-A) – 1000V charge

Octal D-Type Flip-Flops With Clear

文件：1.27001 Mbytes Page：30 Pages

Octal D-Type Flip-Flops With Clear

文件：1.27001 Mbytes Page：30 Pages

OCTAL D-TYPE FLIP-FLOPS WITH CLEAR

文件：584.66 Kbytes Page：18 Pages

OCTAL D-TYPE FLIP-FLOPS WITH CLEAR

文件：835.78 Kbytes Page：21 Pages

封装/外壳：20-SSOP（0.209"，5.30mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20SSOP 集成电路（IC） 触发器

Octal D-type flip-flop with reset; positive-edge trigger

DESCRIPTION The 74AHC/AHCT273 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT273 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The c

Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs

Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs

Octal D-type flip-flop with reset; positive-edge trigger

Octal D-type flip-flop with reset; positive-edge trigger

DESCRIPTION The 74AHC/AHCT273 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT273 have eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The c