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SN74ABT841A价格
参考价格：￥6.9097
型号：SN74ABT841ADBR 品牌：TI 备注：这里有SN74ABT841A多少钱，2026年最近7天走势，今日出价，今日竞价，SN74ABT841A批发/采购报价，SN74ABT841A行情走势销售排行榜，SN74ABT841A报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74ABT841A | 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 |   | |
SN74ABT841A | 具有三态输出的 10 位总线接口 D 类锁存器 | TI 德州仪器 | | |
SN74ABT841A | 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS 文件：109.72 Kbytes Page：7 Pages | TI 德州仪器 | | |
SN74ABT841A | 10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | |
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS 文件：109.72 Kbytes Page：7 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
封装/外壳：24-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC 10BIT BUS-INTFC D 3ST 24-SSOP 集成电路（IC） 锁存器 | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 10BIT BUS INT D LATCH 24-SOIC 集成电路（IC） 锁存器 | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS 文件：109.72 Kbytes Page：7 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS 文件：109.72 Kbytes Page：7 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS 文件：109.72 Kbytes Page：7 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-BIT BUS-INTERFACE D-TYPE LATCHES ITH 3-STATE OUTPUTS 文件：788.68 Kbytes Page：21 Pages | TI 德州仪器 | | ||
10-bit bus interface latch; 3-state | ETC 知名厂家 | ETC | | |
10-bit bus interface latch 3-State DESCRIPTION The 74ABT841 Bus interface register is designed to provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data paths or buses carrying parity • Ideal where high speed, lig | Philips 飞利浦 | | ||
10-bit bus interface latch; 3-state | ETC 知名厂家 | ETC | | |
10-bit bus interface latch 3-State DESCRIPTION The 74ABT841 Bus interface register is designed to provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data paths or buses carrying parity • Ideal where high speed, lig | Philips 飞利浦 | | ||
10-bit bus interface latch 3-State DESCRIPTION The 74ABT841 Bus interface register is designed to provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Extra data width for wide address/data paths or buses carrying parity • Ideal where high speed, lig | Philips 飞利浦 | |
SN74ABT841A产品属性
- 类型
描述
- 型号
SN74ABT841A
- 功能描述
闭锁 10bit Bus D
- RoHS
否
- 制造商
Micrel
- 电路数量
1
- 逻辑类型
CMOS
- 逻辑系列
TTL
- 极性
Non-Inverting
- 输出线路数量
9
- 电源电压-最大
12 V
- 电源电压-最小
5 V
- 最大工作温度
+ 85 C
- 最小工作温度
- 40 C
- 封装/箱体
SOIC-16
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
24+ |
SSOP-24 |
9600 |
原装现货,优势供应,支持实单! |
|||
TI/德州仪器 |
23+ |
11200 |
原厂授权一级代理、全球订货优势渠道、可提供一站式BO |
||||
24+ |
N/A |
69000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
TI/德州仪器 |
25+ |
TSSOP24 |
880000 |
明嘉莱只做原装正品现货 |
|||
ADI |
23+ |
SOP |
8000 |
只做原装现货 |
|||
TI |
23+ |
SOIC-24 |
23960 |
代理渠道,价格优势,有挂就有 |
|||
TI/德州仪器 |
23+ |
SOP |
50000 |
全新原装正品现货,支持订货 |
|||
TI |
22+ |
24TSSOP |
9000 |
原厂渠道,现货配单 |
|||
TI |
24+ |
3000 |
自己现货 |
||||
TI |
20+ |
SSOP-24 |
2960 |
诚信交易大量库存现货 |
SN74ABT841A规格书下载地址
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https://hch01.114ic.com/
2020-11-13
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