10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015 Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

10-bit D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ABT821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • High speed parallel registers with positive edge-triggered D-type flip-flops • Ideal where high speed, light loading, or increased fan-in

10-bit D-type flip-flop; positive-edge trigger; 3-state

10-bit D-type flip-flop; positive-edge trigger; 3-state

10-bit D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ABT821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • High speed parallel registers with positive edge-triggered D-type flip-flops • Ideal where high speed, light loading, or increased fan-in

10-bit D-type flip-flop; positive-edge trigger 3-State

DESCRIPTION The 74ABT821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • High speed parallel registers with positive edge-triggered D-type flip-flops • Ideal where high speed, light loading, or increased fan-in