CMOS HIGH SPEED GATE ARRAY

DESCRIPTION The SLA7000 Series consists of a group of 6 CMOS gate arrays with gate counts from 1,632 to 16,250 gates. The series is fabricated utilizing our 1.5 micron high speed CMOS silicon gate technology to achieve propagation delays of 1.0ns for the internal gates. All I/O buffers are TTL an

Decade and Binary Counters

General Description The DM7490A monolithic counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five. The counter has a gated zero reset and also has gated setto-nine

The ’90 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divideby- five counter.

DESCRIPTION — The ’90 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divideby- five counter. It can be connected to operate with a conventional BCD output pattern or it can be connected to provide a 50% duty cycle

Decade and Binary Counters

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Package Contains a Divide-by-Two and a Divide-by-Five Counter

文件：410.83 Kbytes Page：1 Pages

Package Contains a Divide-by-Two and a Divide-by-Five Counter

文件：410.83 Kbytes Page：1 Pages