Multi-DSPLL Wireless Jitter Attenuator / Clock Multiplier with Ultra-Low Noise

KEY FEATURES • Supports simultaneous Ethernet, CPRI and general-purpose clocking in a single device • Input frequency range: • Differential: 8 kHz - 750 MHz • LVCMOS: 8 kHz to 250 MHz • Output frequency range: • CPRI: up to 2.94912 GHz • Other differential: up to 735 MHz • LVCMOS: up to 2

功能：时钟乘法器 包装：盒 描述：EVALUATION BOARD KIT SI5381A 开发板，套件，编程器 评估和演示板及套件

40-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC

GENERAL DESCRIPTION The AD5381 is a complete, single-supply, 40-channel, 12-bit denseDAC® available in a 100-lead LQFP package. All 40 channels have an on-chip output amplifier with rail-to-rail operation. FEATURES Guaranteed monotonic INL error: ±1 LSB max On-chip 1.25 V/2.5 V, 10 p

40-Channel, 3 V/5 V, Single-Supply 12-Bit, denseDAC

GENERAL DESCRIPTION The AD5381 is a complete, single-supply, 40-channel, 12-bit denseDAC® available in a 100-lead LQFP package. All 40 channels have an on-chip output amplifier with rail-to-rail operation. FEATURES Guaranteed monotonic INL error: ±1 LSB max On-chip 1.25 V/2.5 V, 10 p

24Bit 96kHz ?誇 ADC

GENERAL DESCRIPTION The AK5381 is a stereo A/D Converter with wide sampling rate of 4kHz ∼ 96kHz and is suitable for High-end audio system. The AK5381 achieves high accuracy and low cost by using Enhanced dual bit ∆Σ techniques. The AK5381 requires no external components because the analog inputs

T-1 3/4 Vertical LED Assembly

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Evaluation board Rev.A for AK5381

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