封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC BUFFER1:5 LVPECL 20TSSOP 集成电路（IC） 时钟缓冲器，驱动器

Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz

KEY FEATURES • Ultra-low additive jitter: 50 fs rms • Built-in LDOs for high PSRR performance • Up to 10 LVPECL Outputs • Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) • Wide frequency range: dc to 1250 MHz • Output Enable option • Multiple configuration options •

1:5 LOW JITTER LVPECL CLOCK BUFFER

文件：1.68532 Mbytes Page：25 Pages

Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz

KEY FEATURES • Ultra-low additive jitter: 50 fs rms • Built-in LDOs for high PSRR performance • Up to 10 LVPECL Outputs • Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) • Wide frequency range: dc to 1250 MHz • Output Enable option • Multiple configuration options •

Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz

KEY FEATURES • Ultra-low additive jitter: 50 fs rms • Built-in LDOs for high PSRR performance • Up to 10 LVPECL Outputs • Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) • Wide frequency range: dc to 1250 MHz • Output Enable option • Multiple configuration options •

Output Enable option

文件：1.07335 Mbytes Page：51 Pages