位置：首页 > IC中文资料第11114页 > SI5330
SI5330价格
参考价格：￥720.5744
型号：SI53301/4-EVB 品牌：Fairchild 备注：这里有SI5330多少钱，2024年最近7天走势，今日出价，今日竞价，SI5330批发/采购报价，SI5330行情走势销售排行榜，SI5330报价。| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SI5330 | Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 |  |   |
SI5330 | 1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 |  | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
DUAL1:5LOW-JITTER,ANY-FORMATBUFFER/LEVELTRANSLATOR(GHZ) Features 2independentbanksof5x differentialoutputs Ultra-lowadditivejitter:45fsrms Widefrequencyrange: dcto1.25GHz Any-formatinputwithpinselectable outputformats:LVPECL,LowPower LVPECL,LVDS,CML,HCSL, LVCMOS Asynchronousoutputenable Lowoutput-outp | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1:6LOWJITTERUNIVERSALBUFFER/LEVELTRANSLATORWITH2:1INPUTMUXANDINDIVIDUALOE(GHZ) Features 6differentialor12LVCMOSoutputs Ultra-lowadditivejitter:45fsrms Widefrequencyrange: dcto1.25GHz Universalinputwithpinselectable outputformats LVPECL,LowPowerLVPECL, LVDS,CML,HCSL,LVCMOS 2:1muxwithhot-swappableinputs Individualoutputen | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Ultra-LowAdditiveJitterFanoutClockBufferswithupto10UniversalOutputsfromAny-FormatInputandWideFrequencyRangefrom1MHzto725MHz KEYFEATURES •Ultra-lowadditivejitter:50fsrms •Built-inLDOsforhighPSRRperformance •Upto10outputs •Any-formatInputs(LVPECL,Low-power LVPECL,LVDS,CML,HCSL,LVCMOS) •Widefrequencyrange •OutputEnableoption •Multipleconfigurationoptions •DualBankoption •2:1 | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features Supportssingle-endedor differentialinputclocksignals Generatesfourdifferential (LVPECL,LVDS,HCSL)oreight single-ended(CMOS,SSTL, HSTL)outputs Providessignalleveltranslation Differentialtosingle-ended Single-endedtodifferential Differentialtodif | SKYWORKSSkyworks Solutions Inc. 思佳讯美国思佳讯公司 | | | |
Supportssingle-endedordifferentialinputclocksingnalsGeneratesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | | |
1.8/2.5/3.3VLOW-JITTER,LOW-SKEWCLOCKBUFFER/LEVELTRANSLATOR Features ■Supportssingle-endedordifferentialinputclocksignals ■Generatesfourdifferential(LVPECL,LVDS,HCSL)oreightsingle-ended(CMOS,SSTL,HSTL)outputs ■Providessignalleveltranslation ●Differentialtosingle-ended ●Single-endedtodifferential ●Differentialt | SILABSSilicon Laboratories 芯科科技深圳芯科科技有限公司 | | |
SI5330产品属性
- 类型
描述
- 型号
SI5330
- 制造商
SILABS
- 制造商全称
SILABS
- 功能描述
Supports single-ended or differential input clock singnals Generates four differential(LVPECL, LVDS, HCSL) or eight single-ended(CMOS, SSTL, HSTL) outputs
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Skyworks(思佳讯) |
23+ |
标准封装 |
8048 |
支持大陆交货,美金交易。原装现货库存。 |
|||
SKYWORK |
23+ |
SMD |
918000 |
明嘉莱只做原装正品现货 |
|||
SILICON |
23+ |
VFQFN32 |
6000 |
全新原装现货、诚信经营! |
|||
Skyworks |
21+ |
QFN44 |
689 |
全新原装公司现货
|
|||
OTHER/其它 |
23+ |
NA |
7825 |
原装正品!清仓处理! |
|||
SILICON芯科 |
23+ |
QFN44 |
11509 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
SILICON |
20+ |
SMD |
3780 |
只做原装正品假一赔十!正规渠道订货! |
|||
SILICON |
23+ |
QFN16 |
280008 |
||||
SILICON/芯科 |
23+ |
QFN16 |
97500 |
郑重承诺只做原装进口现货 |
|||
SILICON |
2024 |
VFQFN16 |
16697 |
原装现货,欢迎咨询 |
SI5330芯片相关品牌
SI5330规格书下载地址
SI5330参数引脚图相关
- sw-262
- stm32f103
- stm32
- stk
- stc89c52rc
- stc12c5a60s2
- st70
- st18
- sst25vf040
- sr2m
- spwm
- spice模型
- spd
- sp3232
- soc
- smd
- sl11
- sk100
- sja1000
- sig
- Si5332A
- SI53325
- SI53323
- SI53322
- SI53321
- SI53320
- SI5332
- SI53315
- SI53314
- SI53313
- SI53312
- SI53311
- SI5330F-B00214-GM
- SI5330C-B00209-GM
- SI5330C-B00208-GM
- SI5330C-B00207-GM
- SI5330B-B00206-GM
- SI5330B-B00205-GM
- SI5330B-B00204-GM
- SI5330A-B00202-GM
- SI5330A-B00200-GM
- SI53308-B-GM
- SI53308
- SI53307-B-GM
- SI53307
- SI53306-B-GM
- SI53306
- SI53305-B-GM
- SI53305
- SI53304-B-GM
- SI53304
- SI53303-B-GM
- SI53303
- SI53302-B-GMR
- SI53302-B-GM
- SI53302
- SI53301-B-GMR
- SI53301-B-GM
- SI53301/4-EVB
- SI53301
- SI533
- SI5328-EVB
- SI5328C-C-GM
- SI5328B-C-GM
- SI5328
- SI5327D-C-GM
- SI5327C-C-GM
- SI5327B-C-GM
- SI5327
- SI5326C-C-GM
- SI5326B-C-GMR
- SI5326B-C-GM
- SI5326A-C-GM
- SI5326
- SI5325C-C-GM
- SI5325B-C-GM
- Si5325
- SI5324-EVB
- SI5324D-C-GM
- SI5324B-C-GM
- SI5324A-C-GM
- Si5324
- SI5323-C-GM
- Si5323
- SI5322
- SI5321-H-GL
- SI5321-H-BL
- SI5321
- SI5320
- Si532
- SI5319
- SI5318
- SI5317-EVB
- SI5317
- SI5316
- SI53159
- SI53156
- SI53154
- SI53152
- SI5315
SI5330数据表相关新闻
SI52147-A01AGMR SILICON/芯科 21+ QFN48
https://hfx03.114ic.com/
2022-1-28Si512
Si512，全新.当天发货或门市自取，如需了解更多产品信息联系我们.零七五五.八二七三二二九一企鹅:一一七四零五二三五三，V:八七六八零五五八.
2021-11-10SI53340-B-GM
SI53340-B-GM
2021-10-29SI53307-B-GM
SI53307-B-GM
2021-7-30SI5332A-D-GM1
ProgrammableClockGenerators时钟发生器及支持产品,QFN-48时钟发生器及支持产品,333.33MHz时钟发生器及支持产品,4OutputQFN-24时钟发生器及支持产品,1OutputClockGenerators时钟发生器及支持产品,6Output100MHz时钟发生器及支持产品
2020-7-8SI5315B-C-GM
ProgrammableClockGenerators时钟发生器及支持产品,QFN-48时钟发生器及支持产品,ProgrammableClockGenerators时钟发生器及支持产品,8Output时钟发生器及支持产品,ProgrammableClockGenerators时钟发生器及支持产品,350MHz时钟发生器及支持产品
2020-7-8
DdatasheetPDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
