PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/ JITTER ATTENUATOR

Features  Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz  Ultra-low jitter clock outputs as low as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz)  Integrated loop filter with selectable loop bandwidth

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

抖动衰减器时钟倍频器

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Description The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications that require jitter attenuation without clock multiplication. The Si5317 accepts a single clock input ranging from 1 to 710 MHz and generates two low jitter clock outputs at the same frequency. The cl

PIN-CONTROLLED 1–711 MHZ JITTER CLEANING CLOCK

Features  Provides jitter attenuation for any clock frequency  One clock input / two clock outputs  Input/output frequency range: 1–711 MHz  Ultra low jitter: 300 fs (12 kHz–20 MHz) typical  Simple pin control interface  Selectable loop bandwidth for jitter attenuation: 60 Hz–8.4 k

封装/外壳：36-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK JITTER CLEANR PROG 36QFN 集成电路（IC） 时钟发生器，PLL，频率合成器

Jitter Attenuator Clock Multiplier

封装/外壳：36-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK JITTER CLEANR PROG 36QFN 集成电路（IC） 时钟发生器，PLL，频率合成器

Jitter Attenuator Clock Multiplier

Si5317 EVALUATION BOARD

文件：825.08 Kbytes Page：20 Pages

2.5 V to 5.5 V, 230uA, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5332/AD5333/AD5342/AD5343 are dual 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 230 µA at 3 V, and feature a power-down pin, PD that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can dr

2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5330/AD5331/AD5340/AD53411 are single 8-/10-/12- bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the

2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 µA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive

2.5 V to 5.5 V, 500 關A, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead Packages

GENERAL DESCRIPTION The AD5304/AD5314/AD53241 are quad 8-, 10-, and 12-bit buffered voltage output DACs in 10-lead MSOP and 10-lead LFCSP packages that operate from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V. Their on-chip output amplifiers allow rail-to-rail output swing to be achie

2.5 V to 5.5 V, 500 uA, 2-Wire Interface Quad Voltage Output, 8-/10-/12-Bit DACs

文件：427.29 Kbytes Page：20 Pages