N- and P-Channel 30-V (D-S) MOSFET

FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFETs • Compliant to RoHS Directive 2002/95/EC

Complementary MOSFET Half-Bridge (N- and P-Channel)

N- and P-Channel 30-V (D-S) MOSFET

文件：65.61 Kbytes Page：7 Pages

N- and P-Channel 30-V (D-S) MOSFET

FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFETs • Compliant to RoHS Directive 2002/95/EC

N- and P-Channel 30-V (D-S) MOSFET

文件：92.88 Kbytes Page：8 Pages

N- and P-Channel 30-V (D-S) MOSFET

文件：65.61 Kbytes Page：7 Pages

N- and P-Channel 30 V (D-S) MOSFET

文件：1.2332 Mbytes Page：14 Pages

Dual 4-input multiplexer

DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to

Dual 4-input multiplexer

DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to

Dual 4-input multiplexer

DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to

Dual 4-input multiplexer

DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to

Dual 4-input multiplexer

DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to