Octal D-type Flip Flops with 3-state Outputs

Description The RD74LVC574B has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input. When the clock input goes low, data at the D inp

Octal D-type Flip Flops with 3-state Outputs

文件：82.03 Kbytes Page：9 Pages

Octal D-type Flip Flops with 3-state Outputs

文件：106.15 Kbytes Page：11 Pages

Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

DESCRIPTION The 74LVC574A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC

Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

DESCRIPTION The 74LVC574A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC

Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

DESCRIPTION The 74LVC574A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC

Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

DESCRIPTION The 74LVC574A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

文件：914.67 Kbytes Page：25 Pages