FEATURES

• Supports four structured/unstructured

T1 or E1 links, or one unstructured

DS3, E3 or STS-1/STM-0 link over an

AAL1 CBR ATM network.

• Compliant with ATM Forums CES (AFVTOA-0078), and ITU-T I.363.1.

• Supports up to 128 VCs.

• Supports n x 64 (consecutive

channels) and m x 64 (nonconsecutive channels) structured data

format with channel associated

signaling (CAS) support.

• Internal E1/T1 clock synthesizers

provided for each line which can be

controlled via internal synchronous

residual time stamp (SRTS) or an

internal programmable weighted

moving average adaptive clocking

algorithm in unstructured mode. Clock

synthesizers can also be controlled

externally to provide customization of

SRTS or adaptive clocking methods.

• Provides transparent transmission of

CCS and CAS and termination of CAS

signaling.

• Compliant with ATM Forums Dynamic

Bandwidth Circuit Emulation Service

(DBCES) AF-VTOA-0085. Supports

idle channel detection via processor

intervention, CAS signaling, or data

pattern detection. Provides idle

channel indication on a per channel

basis.

• Supports AAL0 mode, selectable on a

per VC basis.

• Provides transmit and receive buffers

which can be used for OAM cells as

well as any other user-generated cells

such as AAL5 cells for ATM signaling.

APPLICATIONS

• Integrated Access Device.

• ATM Optical Networking Unit (ONU), ATM Passive Optical Network (APON).

• Local Multipoint Distribution System (LMDS).

• Unstructured DS-3 over ATM.