Low-Noise Phase-Locked Loop Clock Driver with 9 Clock Outputs

Product Description The PI6C2509-133 is a quiet, low-skew, low-jitter, phase-locked loop (PLL) clock driver, distributing low-noise clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to

Low-Noise Phase-Locked Loop Clock Driver with 9 Clock Outputs

Low-Noise Phase-Locked Loop Clock Driver with 9 Clock Outputs

Product Description The PI6C2509-133 is a quiet, low-skew, low-jitter, phase-locked loop (PLL) clock driver, distributing low-noise clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC PLL CLOCK DRIVER 9OUT 24TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC PLL CLOCK DRIVER 9OUT 24TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器