36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

文件：436.97 Kbytes Page：35 Pages

36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

文件：436.97 Kbytes Page：35 Pages

36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data rat

36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

Features • 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (15 x 17) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports • DDR read or write operation initiated each cycle • Pipelined double data rat