P-Channel Enhancement Mode Field Effect Transistor

General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast swi

丝印代码：610T；1.7Q ,60V P-Channel MOSFET

Product Summary @ Vdss=60V ® ID=05A @ Rbps(oN)=1.7Q@VGs=-10V

P 沟道增强型场效应晶体管，-60V，-0.12A，10Ω

此P沟道增强模式场效应晶体管采用飞兆专有的高密度DMOS技术生产。 这一密度非常高的工艺是专为最大限度地降低通态电阻，提供稳固和可靠的性能以及快速开关而定制的。 NDS0610在要求DC高达120mA的多数应用中可轻松使用，并且可提供高达1A的电流。 该产品特别适合需要低电流高边开关的低电压应用。 •-0.12 A, -60 V. RDS(ON) = 10 Ω @ VGS = -10 V RDS(ON) = 20 Ω @ VGS = -4.5 V\n•电压控制P沟道小信号开关\n•高密度设计可实现低RDS(ON)\n•高饱和电流;

丝印代码：610；P-Channel Enhancement Mode Field Effect Transistor

文件：463.16 Kbytes Page：6 Pages

P-Channel 60 V (D-S) MOSFET

文件：986.76 Kbytes Page：7 Pages

SIPMOS Small-Signal Transistor

SIPMOS® Small-Signal Transistor ● VDS − 60 V ● ID − 0.18 A ● RDS(on) 10 Ω ● P channel ● Enhancement mode

丝印代码：T50*；P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high inpu

N-Channel Enhancement-Mode MOS Transistors

Features ● Zener Diode Input Protected ● Low On-Resistance: 3 Ω ● Ultralow Threshold: 1.2 V ● Low Input Capacitance: 38 pF ● Low Input and Output Leakage Benefits ● Extra ESD Protection ● Low Offset Voltage ● Low-Voltage Operation ● High-Speed, Easily Driven ● Low Error Voltage Appli

N-Channel Enhancement-Mode MOS Transistors

Features ● Zener Diode Input Protected ● Low On-Resistance: 3 Ω ● Ultralow Threshold: 1.2 V ● Low Input Capacitance: 38 pF ● Low Input and Output Leakage Benefits ● Extra ESD Protection ● Low Offset Voltage ● Low-Voltage Operation ● High-Speed, Easily Driven ● Low Error Voltage Appli

N-Channel Enhancement-Mode Vertical DMOS FETs

文件：31.44 Kbytes Page：4 Pages