型号 功能描述 生产厂家&企业 LOGO 操作
N74F113N

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

N74F113N产品属性

  • 类型

    描述

  • 型号

    N74F113N

  • 功能描述

    触发器 DUAL J-K NEG EDGE F/F

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-8-14 16:53:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
PHI
9509
SOP
8917
原装现货
NEXPERIA/安世
19+
NA
5000
原装进口香港现货
恩XP
25+
电联咨询
7800
公司现货,提供拆样技术支持
恩XP
23+
3.9MM
30000
代理全新原装现货,价格优势
PHI
20+
SOP3.9
2960
诚信交易大量库存现货
PHI
24+
NA/
5750
原装现货,当天可交货,原型号开票
PHI
24+
SOP3.9
2568
原装优势!绝对公司现货
恩XP
2023+
3.9MM
2500
一级代理优势现货,全新正品直营店
PHIL
24+/25+
2785
原装正品现货库存价优
PHI
NA
8560
一级代理 原装正品假一罚十价格优势长期供货

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