型号 功能描述 生产厂家&企业 LOGO 操作
N74F113D

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

N74F113D产品属性

  • 类型

    描述

  • 型号

    N74F113D

  • 制造商

    Freescale Semiconductor

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

  • 制造商

    North American Philips Discrete Products Div

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

  • 制造商

    NXP Semiconductors

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

更新时间:2025-8-14 9:25:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
PHI
6000
面议
19
SOIC
恩XP
23+
3.9MM
50000
全新原装正品现货,支持订货
PHI
24+
NA
990000
明嘉莱只做原装正品现货
PHI
9509
SOP
8917
原装现货
PHI
20+
SOP3.9
2960
诚信交易大量库存现货
PHIL
24+/25+
2785
原装正品现货库存价优
恩XP
25+
SOT108
188600
全新原厂原装正品现货 欢迎咨询
PHI
23+
原厂封装
12300
恩XP
2023+
3.9MM
2500
一级代理优势现货,全新正品直营店
恩XP
24+
NA
9600
原装现货,优势供应,支持实单!

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