型号 功能描述 生产厂家 企业 LOGO 操作
N74F113D

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

N74F113D

Dual J-K negative edge-triggered flip-flops without reset

ETC

知名厂家

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Philips

飞利浦

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

Fairchild

仙童半导体

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

Fairchild

仙童半导体

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

Fairchild

仙童半导体

Dual JK Negative Edge-Triggered Flip-Flop

General Description The 74F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may be entered. The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as lo

Fairchild

仙童半导体

N74F113D产品属性

  • 类型

    描述

  • 型号

    N74F113D

  • 制造商

    Freescale Semiconductor

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

  • 制造商

    North American Philips Discrete Products Div

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

  • 制造商

    NXP Semiconductors

  • 功能描述

    Flip Flop, Dual, J/K Type, 14 Pin, Plastic, SOP

更新时间:2025-11-24 20:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
PHI
24+
NA/
4450
原装现货,当天可交货,原型号开票
PHI
24+
NA
990000
明嘉莱只做原装正品现货
恩XP
08+
3.9MM
2500
一级代理,专注军工、汽车、医疗、工业、新能源、电力
恩XP
25+
3.9MM
30000
代理全新原装现货,价格优势
PHI
NEW
原厂封装
12300
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订
PHI
22+
SOP-14
5000
只做原装鄙视假货15118075546
PHI
6000
面议
19
SOIC
PHI
SOP
125000
一级代理原装正品,价格优势,长期供应!
PHI
950
全新原装 货期两周
恩XP
23+
SOP14
8650
受权代理!全新原装现货特价热卖!

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