3.3V 1:12 LVCMOS PLL Clock Generator

3.3V 1:12 LVCMOS PLL Clock Generator The MPC9772 is a 3.3V compatible, 1:12 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance networking, computing and telecom applications. With output frequencies up to 240 MHz and output skews l

3.3V 1:12 LVCMOS PLL Clock Generator Internal Power-On Reset

3.3V 1:12 LVCMOS PLL Clock Generator The MPC9772 is a 3.3 V compatible, 1:12 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance networking, computing and telecom applications. With output frequencies up to 240 MHz and output skews

3.3V 1:12 LVCMOS PLL Clock Generator

The MPC9772 is a 3.3 V compatible, 1:12 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance networking, computing and telecom applications. With output frequencies up to 240 MHz and output skews less than 250 ps the device meets

1:12 LVCMOS Clock Generator

3.3V 1:12 LVCMOS PLL Clock Generatorzer

封装/外壳：52-LQFP 包装：散装 描述：IC PLL CLK GENERATOR 1:12 52LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：52-LQFP 包装：卷带（TR） 描述：IC PLL CLK GEN 1:12 3.3V 52-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

14-Bit, 150 MSPS TxDAC??with 2x Interpolation Filter

文件：340.35 Kbytes Page：30 Pages

14-Bit, 160 MSPS TxDAC with 2x Interpolation Filter

文件：596.95 Kbytes Page：32 Pages

14-Bit, 160 MSPS TxDAC with 2x Interpolation Filter

文件：596.95 Kbytes Page：32 Pages

14-Bit, 150 MSPS TxDAC??with 2x Interpolation Filter

文件：340.35 Kbytes Page：30 Pages

14-Bit, 160 MSPS TxDAC with 2x Interpolation Filter

文件：596.95 Kbytes Page：32 Pages