| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as | PHILIPS 飞利浦 | |||
Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as | PHILIPS 飞利浦 | |||
Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as | PHILIPS 飞利浦 | |||
Silicon planar type Silicon planar type For stabilization of power supply ■ Features • High reliability, achieved by the DHD structure • Allowing to insert to a 5 mm pitch hole • Finely divided zener-voltage rank • Sharp rising performance • Wide voltage range: VZ = 2.0 V to 39 V | PANASONIC 松下 | |||
Silicon planar type Silicon planar type For stabilization of power supply ■ Features • High reliability, achieved by the DHD structure • Allowing to insert to a 5 mm pitch hole • Finely divided zener-voltage rank • Sharp rising performance • Wide voltage range: VZ = 2.0 V to 39 V | PANASONIC 松下 |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Panasonic-SSG |
24+ |
DO-34Axial |
7500 |
||||
Panasonic |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
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2019-4-4
DdatasheetPDF页码索引
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