Dual D-Type Flip-Flop with Preset and Clear

General Description The MM74HCT74 utilizes advanced silicon-gate CMOS technology to achieve operation speeds similar to the equivalent LS-TTL part. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL load

Dual D-Type Flip-Flop with Preset and Clear

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MM74HCT74 Dual D-Type Flip-Flop with Preset and Clear

文件：368.92 Kbytes Page：10 Pages

Dual D-Type Flip-Flop with Preset and Clear

文件：247.8 Kbytes Page：9 Pages

封装/外壳：14-SOIC（0.209"，5.30mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14SOP 集成电路（IC） 触发器

封装/外壳：14-SOIC（0.209"，5.30mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14SOP 集成电路（IC） 触发器

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: flip-flops

Dual D-type flip-flop with set and reset; positive edge-trigger

1. General description The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-

Dual D-type flip-flop with set and reset; positive edge-trigger

文件：175.47 Kbytes Page：21 Pages