BCD-to-Decimal Decoder

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Dual Retriggerable Monostable Multivibrator

General Description The 74HC423A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each mult

Dual Retriggerable Monostable Multivibrator

General Description The 74HC423A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each mult

Dual Retriggerable Monostable Multivibrator

General Description The 74HC423A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each mult

Dual Retriggerable Monostable Multivibrator

General Description The 74HC423A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each mult

Dual Retriggerable Monostable Multivibrator

General Description The 74HC423A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits. Each mult

Dual Retriggerable Monostable Multivibrator

封装/外壳：16-DIP（0.300"，7.62mm） 包装：管件 描述：IC MULTIVIBRATOR 22NS 16DIP 集成电路（IC） 多谐振荡器

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder (1-of-10)

1. General description The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Y to 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most sig

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW

BCD to decimal decoder 1-of-10

GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW