Dual 2 - To - 4 Line Decoder-Demultiplexers

文件：104.04 Kbytes Page：4 Pages

Dual 2 - To - 4 Line Decoder-Demultiplexers

文件：104.04 Kbytes Page：4 Pages

Dual 2 - To - 4 Line Decoder-Demultiplexers

文件：104.04 Kbytes Page：4 Pages

DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER

DESCRIPTION The M54/74HC155 is a high speed CMOS DUAL 2-TO-4 LINE DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

Dual 2-to-4-line Decoders/Demultiplexers

Description This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each se

DUAL 2-TO-4 LINE DECODERS/DEMULTIPLEXERS

DUAL 2-TO-4 LINE DECODERS/DEMULTIPLEXERS

Dual 2-to-4-line Decoders/Demultiplexers

Description This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each se

Dual 2-to-4-line Decoders/Demultiplexers

Description This circuit features dual 1-line-to-4-line demultiplexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each sect