Quad 2-Channel Multiplexer with 3-State Outputs

The MC74VHC257 is an advanced high speed CMOS quad 2--channel multiplexer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The inputs tolerate voltages up to 7 V, allowing the in

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC MULTIPLEXER 4 X 2:1 16SOEIAJ 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC MULTIPLEXER 4 X 2:1 16SOEIAJ 集成电路（IC） 信号开关，多路复用器，解码器

QUAD 2 CHANNEL MULTIPLEXER 3-STATE

DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C ■ HIGH NOISE I

QUAD 2 CHANNEL MULTIPLEXER 3-STATE

DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C ■ HIGH NOISE I

QUAD 2 CHANNEL MULTIPLEXER 3-STATE

DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C ■ HIGH NOISE I

QUAD 2 CHANNEL MULTIPLEXER 3-STATE

DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C ■ HIGH NOISE I

QUAD 2 CHANNEL MULTIPLEXER 3-STATE

DESCRIPTION The 74VHC257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C ■ HIGH NOISE I