Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout With 5 V?뭈olerant Inputs and Outputs (3?뭆tate, Non?묲nverting)

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Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout

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封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC LATCH TRANSP OCT LV 20SOIC 集成电路（IC） 锁存器

Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs

General Description The LCX573 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) input. Features ■ 5V tolerant inputs and outputs ■ 2.3V–3.6V VCC specifications provided ■ 7.0 ns tPD max (VCC = 3.3V), 10µA ICC max ■ Power down high

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The 74LCX573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON-INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for

CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Low-Voltage Octal D-Type Latch with 5-V Tolerant Inputs and Outputs General The 74LCX573FT is a high-performance CMOS octal D-type latch. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The 74LCX573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON-INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

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