Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs

Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT273A may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. The HCT273A is identical in pinout to the LS273. This device c

Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs

Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT273A may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT273A is identical in pinout to the LS273. This device cons

Octal D Flip?묯lop with Common Clock and Reset with LSTTL?묬ompatible Inputs

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封装/外壳：20-DIP（0.300"，7.62mm） 功能：复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

封装/外壳：20-DIP（0.300"，7.62mm） 功能：复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs

文件：141.49 Kbytes Page：7 Pages

Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIG

Octal D-type flip-flop with reset; positive-edge trigger

General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH c

Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIG

Octal D-type flip-flop with reset; positive-edge trigger

General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH c

Octal D-type flip-flop with reset; positive-edge trigger