Quad 3-State Noninverting Buffer with LSTTL Compatible Inputs

The MC74HCT125A is identical in pinout to the LS125. The device inputs are compatible with standard CMOS and LSTTL outputs. The MC74HCT125A noninverting buffer is designed to be used with 3−state memory address drivers, clock drivers, and other bus−oriented systems. The devices have four separate

Quad 3-State Noninverting Buffer

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封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC BUFFER NON-INVERT 6V 14SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Quad buffer/line driver; 3-state

1. General description The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICC category: MSI

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICC category: MSI

Quad buffer/line driver; 3-state

QUADRUPLE 3-STATE BUFFERS OE LOW

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