Octal D Flip-Flop with Common Clock and Enable High?뭁erformance Silicon?묰ate CMOS

High−Performance Silicon−Gate CMOS The MC74HC377A is identical in pinout to the LS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of eight D flip−flops with common Clock and Enable (E) inputs.

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 功能：标准 包装：卷带（TR）剪切带（CT） 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路（IC） 触发器

OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER

OCTAL D-TYPE FLIP-FLOP WITH DATA ENABLE POSITIVE EDGE TRIGGER

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO