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74HC377D价格

参考价格:¥1.0096

型号:74HC377D,652 品牌:NXP 备注:这里有74HC377D多少钱,2026年最近7天走势,今日出价,今日竞价,74HC377D批发/采购报价,74HC377D行情走势销售排行榜,74HC377D报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74HC377D

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

74HC377D

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO

NEXPERIA

安世

74HC377D

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transit • Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC377: CMOS level\n• For 74HCT377: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377‑Q100; 74HCT377‑Q100 is an octal positive‑edge triggered D‑type flip‑flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW‑to‑HIGH clock (C • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC377-Q100: CMOS level\n• For 74HCT377-Q100: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• C;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377‑Q100; 74HCT377‑Q100 is an octal positive‑edge triggered D‑type flip‑flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW‑to‑HIGH clock (C • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC377-Q100: CMOS level\n• For 74HCT377-Q100: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• C;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements

NEXPERIA

安世

封装/外壳:20-SOIC(0.295",7.50mm 宽) 功能:标准 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC FF D-TYPE SNGL 8BIT 20SO 集成电路(IC) 触发器

ETC

知名厂家

封装/外壳:20-SSOP(0.209",5.30mm 宽) 功能:标准 包装:管件 描述:IC FF D-TYPE SNGL 8BIT 20SSOP 集成电路(IC) 触发器

ETC

知名厂家

Octal D-type flip-flop with data enable; positive-edge trigger

文件:721.41 Kbytes Page:18 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

文件:721.41 Kbytes Page:18 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

74HC377D产品属性

  • 类型

    描述

  • VCC (V):

    2.0 - 6.0

  • Logic switching levels:

    CMOS

  • Output drive capability (mA):

    ± 7.8

  • tpd (ns):

    13

  • fmax (MHz):

    83

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    80

  • Ψth(j-top) (K/W):

    22.7

  • Rth(j-c) (K/W):

    56

  • Package name:

    SO20

更新时间:2026-5-18 10:11:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
恩XP
SOP
22+
6000
十年配单,只做原装
NEXPERIA
18/19
SOP-20
50000
全新原装公司现货
NEXPERIA/安世
21+
SOP7.2MM
8080
只做原装,质量保证
PHI
25+
SOP20
3200
全新原装、诚信经营、公司现货销售
NEXPERIA/安世
26+
SOP7.2MM
8880
原装认准芯泽盛世!
恩XP
16+
NA
8800
诚信经营
恩XP
24+
DIPSOP
65200
一级代理/放心采购
NEXPERIA
24+
N/A
50524
原装正品,现货库存,1小时内发货
恩XP
26+
SOP20
86720
全新原装正品价格最实惠 假一赔百
HEF
23+
SOP
50000
全新原装正品现货,支持订货

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