型号 功能描述 生产厂家 企业 LOGO 操作
MC74ACT109D

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

MC74ACT109D

Dual JK positive edge-triggered flip-flop

ETC

知名厂家

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

MC74ACT109D产品属性

  • 类型

    描述

  • 型号

    MC74ACT109D

  • 制造商

    ON Semiconductor

  • 功能描述

    Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SOIC Rail

  • 制造商

    Rochester Electronics LLC

  • 功能描述

    - Bulk

更新时间:2025-11-23 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
onsemi(安森美)
24+
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
onsemi(安森美)
24+
1476
原装现货,免费供样,技术支持,原厂对接
ON
25+
SOIC14
4500
全新原装、诚信经营、公司现货销售!
MOTOROLA
25+
10000
公司优势库存 热卖中!
ON
24+
SOP16P3.9
3000
公司现货
MOT
23+
DIP-8P
5000
原装正品,假一罚十
MOT
24+
原装
6980
原装现货,可开13%税票
ON/安森美
23+
SOP16
50000
全新原装正品现货,支持订货
ON/安森美
23+
SOP16
10000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
24+
N/A
78000
一级代理-主营优势-实惠价格-不悔选择

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