型号 功能描述 生产厂家 企业 LOGO 操作
MC74ACT109

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK positive edge-triggered flip-flop

ETC

知名厂家

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

MC74ACT109产品属性

  • 类型

    描述

  • 型号

    MC74ACT109

  • 制造商

    ONSEMI

  • 制造商全称

    ON Semiconductor

  • 功能描述

    DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

更新时间:2026-3-14 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
onsemi(安森美)
25+
-
7786
正规渠道,免费送样。支持账期,BOM一站式配齐
onsemi(安森美)
25+
1476
原装现货,免费供样,技术支持,原厂对接
MOTOROLA
23+
NA
3236
专做原装正品,假一罚百!
onsemi
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
ONSEMI
0020+
5999
全新 发货1-2天
24+
3000
公司现货
MOT
23+
DIP-8P
5000
原装正品,假一罚十
ON/安森美
23+
SOP16
50000
全新原装正品现货,支持订货
MOTOROLA
25+
8000
原装现货,特价销售
MOT
24+
原装
6980
原装现货,可开13%税票

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