MC74ACT10价格

参考价格:¥0.7573

型号:MC74ACT10DR2G 品牌:ONSemi 备注:这里有MC74ACT10多少钱,2025年最近7天走势,今日出价,今日竞价,MC74ACT10批发/采购报价,MC74ACT10行情走势销售排行榜,MC74ACT10报价。
型号 功能描述 生产厂家 企业 LOGO 操作
MC74ACT10

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

MC74ACT10

Triple 3-Input NAND Gate

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

Dual JK positive edge-triggered flip-flop

ETC

知名厂家

封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NAND 3CH 3-INP 14SOIC 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

Triple 3-Input NAND Gate

文件:87.56 Kbytes Page:8 Pages

ONSEMI

安森美半导体

封装/外壳:14-TSSOP(0.173",4.40mm 宽) 包装:卷带(TR) 描述:IC GATE NAND 3CH 3-INP 14TSSOP 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

Triple 3-Input NAND Gate

文件:87.56 Kbytes Page:8 Pages

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

STMICROELECTRONICS

意法半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

STMICROELECTRONICS

意法半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

STMICROELECTRONICS

意法半导体

Triple 3-Input NAND Gate

General Description The AC/ACT10 contains three, 3-input NAND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24mA

Fairchild

仙童半导体

Triple 3-Input NAND Gate

文件:102.64 Kbytes Page:7 Pages

Fairchild

仙童半导体

MC74ACT10产品属性

  • 类型

    描述

  • 型号

    MC74ACT10

  • 制造商

    ONSEMI

  • 制造商全称

    ON Semiconductor

  • 功能描述

    DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

更新时间:2025-12-25 12:05:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
MOT
2023+
3000
进口原装现货
ON/安森美
23+
TSSOP-14
10000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
onsemi(安森美)
24+
TSSOP14
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
M0T
24+
NA/
4650
优势代理渠道,原装正品,可全系列订货开增值税票
ON
24+
SOIC-14
25000
ON全系列可订货
MOT
24+
原装
6980
原装现货,可开13%税票
onsemi
25+
原厂封装
10280
原厂授权代理,专注军工、汽车、医疗、工业、新能源!
三年内
1983
只做原装正品
24+
N/A
69000
一级代理-主营优势-实惠价格-不悔选择
25+
SOP
2700
全新原装自家现货优势!

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