位置:首页 > IC中文资料 > MC74ACT10

MC74ACT10价格

参考价格:¥0.7573

型号:MC74ACT10DR2G 品牌:ONSemi 备注:这里有MC74ACT10多少钱,2026年最近7天走势,今日出价,今日竞价,MC74ACT10批发/采购报价,MC74ACT10行情走势销售排行榜,MC74ACT10报价。
型号 功能描述 生产厂家 企业 LOGO 操作
MC74ACT10

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

MC74ACT10

Triple 3-Input NAND Gate

• Outputs Source/Sink 24 mA\n• ACT10 Has TTL Compatible Inputs\n• Pb-Free Packages Are Available;

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK positive edge-triggered flip-flop

ETC

知名厂家

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available

ONSEMI

安森美半导体

Triple 3-Input NAND Gate

文件:87.56 Kbytes Page:8 Pages

ONSEMI

安森美半导体

封装/外壳:14-SOIC(0.154",3.90mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NAND 3CH 3-INP 14SOIC 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

封装/外壳:14-TSSOP(0.173",4.40mm 宽) 包装:卷带(TR) 描述:IC GATE NAND 3CH 3-INP 14TSSOP 集成电路(IC) 门和反相器

ONSEMI

安森美半导体

Triple 3-Input NAND Gate

文件:87.56 Kbytes Page:8 Pages

ONSEMI

安森美半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

STMICROELECTRONICS

意法半导体

TRIPLE 3-INPUT NAND GATE

DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d

STMICROELECTRONICS

意法半导体

MC74ACT10产品属性

  • 类型

    描述

  • Pb-free:

    Pb

  • Halide free:

    H

  • Status:

    Active

  • Type:

    NAND

  • Channels:

    3

  • VCC Min (V):

    4.5

  • VCC Max (V):

    5.5

  • tpd Max (ns):

    null

  • IO Max (mA):

    24

  • Package Type:

    SOIC-14

更新时间:2026-5-16 9:09:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ON
25+
SOIC14
4500
全新原装、诚信经营、公司现货销售!
26+
N/A
69000
一级代理-主营优势-实惠价格-不悔选择
MOT
2023+
3000
进口原装现货
ON
23+
SOIC
3000
全新原装正品!一手货源价格优势!
ONSEMI/安森美
25+
SOP16
90000
全新原装现货
DIODES(美台)
25+
PowerDI-3333-8
5000
只做原厂原装 可含税 欢迎咨询
ON
25+
PDIP14PBFR
188600
全新原厂原装正品现货 欢迎咨询
MOT
23+
SOP
2500
全新原装正品现货,支持订货
onsemi
25+
原厂封装
10280
onsemi(安森美)
2021+
SOIC-14
499

MC74ACT10数据表相关新闻