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MC74AC10价格
参考价格：￥0.7713
型号：MC74AC10DR2G 品牌：ON 备注：这里有MC74AC10多少钱，2025年最近7天走势，今日出价，今日竞价，MC74AC10批发/采购报价，MC74AC10行情走势销售排行榜，MC74AC10报价。| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
MC74AC10 | TRIPLE 3-INPUT NAND GATE Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available | ONSEMI 安森美半导体 |   | |
MC74AC10 | Triple 3-Input NAND Gate 文件：87.56 Kbytes Page：8 Pages | ONSEMI 安森美半导体 | | |
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
TRIPLE 3-INPUT NAND GATE Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available | ONSEMI 安森美半导体 | | ||
TRIPLE 3-INPUT NAND GATE Features • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • Pb−Free Packages are Available | ONSEMI 安森美半导体 | | ||
Triple 3-Input NAND Gate 文件：87.56 Kbytes Page：8 Pages | ONSEMI 安森美半导体 | | ||
Triple 3-Input NAND Gate 文件：87.56 Kbytes Page：8 Pages | ONSEMI 安森美半导体 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND 3CH 3-INP 14SOIC 集成电路（IC） 门和反相器 | ONSEMI 安森美半导体 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND 3CH 3-INP 14SOIC 集成电路（IC） 门和反相器 | ONSEMI 安森美半导体 | | ||
Triple 3-Input NAND Gate 文件：87.56 Kbytes Page：8 Pages | ONSEMI 安森美半导体 | | ||
Triple 3-Input NAND Gate General Description The AC/ACT10 contains three, 3-input NAND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24mA | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
TRIPLE 3-INPUT NAND GATE DESCRIPTION The 74AC10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All in | STMICROELECTRONICS 意法半导体 | | ||
TRIPLE 3-INPUT NAND GATE DESCRIPTION The 74AC10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All in | STMICROELECTRONICS 意法半导体 | | ||
TRIPLE 3-INPUT NAND GATE 文件：182.7 Kbytes Page：8 Pages | STMICROELECTRONICS 意法半导体 | | ||
Triple 3-Input NAND Gate 文件：102.64 Kbytes Page：7 Pages | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |
MC74AC10产品属性
- 类型
描述
- 型号
MC74AC10
- 制造商
Motorola Inc
- 功能描述
Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
MOTOROLAR |
22+ |
SOP-16 |
100000 |
代理渠道/只做原装/可含税 |
|||
ON(安森美) |
24+ |
NA/ |
8735 |
原厂直销,现货供应,账期支持! |
|||
MOTOROLA/摩托罗拉 |
25+ |
DIP14 |
32360 |
MOTOROLA/摩托罗拉全新特价MC74AC10N即刻询购立享优惠#长期有货 |
|||
MOT |
24+/25+ |
868 |
原装正品现货库存价优 |
||||
三年内 |
1983 |
只做原装正品 |
|||||
ON |
24+ |
SOIC-14 |
25000 |
ON全系列可订货 |
|||
ONSEMI |
2018+ |
26976 |
代理原装现货/特价热卖! |
||||
onsemi |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源！ |
|||
ON(安森美) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
|||
MOTOROLAR |
2223+ |
SOP-16 |
26800 |
只做原装正品假一赔十为客户做到零风险 |
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