位置：首页 > IC中文资料第1317页 > MC74AC109
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
MC74AC109 | Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 |   | |
MC74AC109 | Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav | ONSEMI 安森美半导体 | | |
Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti | Fairchild 仙童半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti | Fairchild 仙童半导体 | | ||
Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes Page：12 Pages | Fairchild 仙童半导体 | | ||
Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes Page：12 Pages | Fairchild 仙童半导体 | |
MC74AC109产品属性
- 类型
描述
- 型号
MC74AC109
- 制造商
Motorola Inc
- 功能描述
Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
MOTOROLA/摩托罗拉 |
23+ |
DIP16 |
50000 |
全新原装正品现货,支持订货 |
|||
MOTOROLA/摩托罗拉 |
23+ |
DIP16 |
66600 |
专业芯片配单原装正品假一罚十 |
|||
onsemi |
25+ |
14-SOIC |
9350 |
独立分销商 公司只做原装 诚心经营 免费试样正品保证 |
|||
MOTOROLAR |
2023+ |
SOP-16 |
2435 |
专注全新正品,优势现货供应 |
|||
ON Semiconductor |
22+ |
14SOIC |
9000 |
原厂渠道,现货配单 |
|||
ON/安森美 |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
MOTOROLA/摩托罗拉 |
23+ |
SOP-16(3.9mm) |
13000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
|||
MOTOROLAR |
24+ |
SOP-16 |
25000 |
一级专营品牌全新原装热卖 |
|||
MOT |
20+ |
SOP16 |
2960 |
诚信交易大量库存现货 |
|||
FSC |
8545+ |
DIP |
30 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
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MC74AC109规格书下载地址
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