Octal 3-State Noninverting Transparent Latch

Octal 3-State Noninverting Transparent Latch High–Performance Silicon–Gate CMOS The MC54/74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent t

Octal 3-State Noninverting Transparent Latch

CDx4HC73 CD74HCT73 Dual J-K Flip-Flop with Reset Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard outputs: 10 LS

Dual J-K Flip-Flop with Reset Negative-Edge Trigger

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Dual J-K Flip-Flop with Reset Negative-Edge Trigger

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Dual J-K Flip-Flop with Reset Negative-Edge Trigger

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Dual J-K Flip-Flop with Reset Negative-Edge Trigger

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