64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64 is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64 adopts the Serial Peripheral Interface (SPI). The

SPI FeRAM系列

FeRAM - SPI接口 (一般用途)

64 K (8 K횞8) ?볝긿?늆PI

文件：295.64 Kbytes Page：32 Pages

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64 is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64 adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64 is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64 adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64 is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64 adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64 is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64 adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64T is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64T adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64T is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64T adopts the Serial Peripheral Interface (SPI). The

64 K (8 K x 8) Bit SPI

DESCRIPTION MB85RS64T is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64T adopts the Serial Peripheral Interface (SPI). The

64 K (8 K X 8) Bit SPI

DESCRIPTION MB85RS64V is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). T

64 K (8 K X 8) Bit SPI

DESCRIPTION MB85RS64V is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). T

64 K (8 K X 8) Bit SPI

DESCRIPTION MB85RS64V is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). T

64 K (8 K X 8) Bit SPI

DESCRIPTION MB85RS64V is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). T

64 K (8 K X 8) Bit SPI

DESCRIPTION MB85RS64V is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS64V adopts the Serial Peripheral Interface (SPI). T

64K (8K X 8) Bit SPI

DESCRIPTION MB85RS64VY is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. This product is specifically targeted for high-temperature

64K (8K X 8) Bit SPI

DESCRIPTION MB85RS64VY is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. This product is specifically targeted for high-temperature

64K (8K X 8) Bit SPI

DESCRIPTION MB85RS64VY is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. This product is specifically targeted for high-temperature

64K (8K X 8) Bit SPI

DESCRIPTION MB85RS64VY is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. This product is specifically targeted for high-temperature

64K (8K X 8) Bit SPI

DESCRIPTION MB85RS64VY is a FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. This product is specifically targeted for high-temperature

Memory FRAM 64 K (8 K x 8) Bit SPI

文件：224.73 Kbytes Page：20 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC FRAM 64KBIT SPI 20MHZ 8SOP 集成电路（IC） 存储器

FeRAM - SPI接口 (一般用途)

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC FRAM 64KBIT SPI 10MHZ 8SOP 集成电路（IC） 存储器

64 K (8 K 횞 8) ?볝긿?늆PI

文件：301.89 Kbytes Page：32 Pages