512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512LY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512LY is able to retain d

FeRAM Product List

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512LY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512LY is able to retain d

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512LY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512LY is able to retain d

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512LY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512LY is able to retain d

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512LY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512LY is able to retain d

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512T is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512T is able to retain dat

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512TY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512TY is able to retain d

512K (64 K x 8) Bit I2C

 DESCRIPTION The MB85RC512TY is an FeRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words  8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512TY is able to retain d