Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

具有2%基准电压源的超低功耗、低成本比较器

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Features ♦ Impro

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

General Description The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltage. Feature

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Differential PECL/ECL/LVPECL/LVECL Receiver/Driver

General Description The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321B features ultra-low pr

Differential PECL/ECL/LVPECL/LVECL Receiver/Driver

General Description The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321B features ultra-low pr

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Differential LVPECL/LVECL/HSTL Receiver/Drivers

General Description The MAX9321/MAX9321A are low-skew differential receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. Features ♦ Improved Second

Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

Ultra Low-Power, Low-Cost Comparators with 2eference

General Description The MAX931-MAX934 single, dual, and quad micropower, low-voltage comparators plus an on-board 2 accurate reference feature the lowest power consumption available. These comparators draw less than 4µA supply current over temperature (MAX931), and include an internal 1.182V ±2 v

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2差分LVPECL/LVECL/HSTL时钟和数据驱动器

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2差分PECL/ECL/LVPECL/LVECL时钟和数据驱动器

封装/外壳：8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装：托盘 描述：IC CLK BUFFER 1:2 3GHZ 8UMAX 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:2 3GHZ 8UMAX 集成电路（IC） 时钟缓冲器，驱动器

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

文件：620.61 Kbytes Page：10 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：220.06 Kbytes Page：13 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：194.68 Kbytes Page：13 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：194.68 Kbytes Page：13 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：194.68 Kbytes Page：13 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：220.06 Kbytes Page：13 Pages

LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

文件：220.06 Kbytes Page：13 Pages

One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver

文件：272.45 Kbytes Page：11 Pages

One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver

文件：272.45 Kbytes Page：11 Pages

One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver

文件：272.45 Kbytes Page：11 Pages

One-to-Five LVPECL/LVCMOS Output Clock and Data Driver

文件：274.41 Kbytes Page：12 Pages

One-to-Five LVPECL/LVCMOS Output Clock and Data Driver

文件：274.41 Kbytes Page：12 Pages

One-to-Five LVPECL/LVCMOS Output Clock and Data Driver

文件：274.41 Kbytes Page：12 Pages

1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver

文件：316.46 Kbytes Page：12 Pages

1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver

文件：316.46 Kbytes Page：12 Pages

1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver

文件：316.46 Kbytes Page：12 Pages

Customer Specification

Construction 1) Component 1 1 X 1 BUSBAR a) Conductor 32 (SOLID) AWG Tinned Copper 0.008

SB® 350 Connectors Up to 500 Amps

The SB® 350 is the largest connector in the series with power capabilities up to 500 amps with a 350 mcm wire. Wires ranging from 1/0 to 350 mcm (53.5 to 185 mm²) fit into the one piece housing available in standard PC or a chemical resistant PBT/PC blend. Silver plated wire or busbar contact

SB® 350 Connector

FEATURES • Mechanical keyed housings Prevents accidental mating of components operating at different voltage levels • Single-piece housing and unitized construction Provides industrial quality and durability • Genderless design Makes assembly quick and easy and reduces number of parts sto

METALLIZED POLYPROPYLENE CAPACITORS

Temperature: -55°C to +85°C at rated voltage; to +105°C with 50 voltage derating. Dielectric Voltage Test: Will withstand the application of 150 VDC, 300 VDC and 600 VDC on 67 VAC, 135 VAC and 270 VAC respectively at 25°C for a period not to exceed 1 minute; current limited to 5 mA. DC Life T

Polypropylene Film Capacitors High Voltage/High Frequency Switching Power Supplies

文件：254.8 Kbytes Page：2 Pages