QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

Quad 2-Input Schmitt NAND Gate

The M74HC132 is a high-speed CMOS quad 2-input Schmitt NAND gate fabricated with silicon gate C2MOS technology.\nPin configuration and function are identical to those of the M74HC00. The hysteresis characteristics (around 20 % VCC) of all inputs allow slowly changing input signals to be transfor High-speed: tPD = 11 ns (typ.) at VCC = 6 V\nLow power dissipation: ICC = 1 μA (max.) at TA = 25 °C\nHigh noise immunity: VH(typ) = 0.9 V at VCC = 5 V\nSymmetrical output impedance: |IOH| = IOL = 4 mA (min.)\nBalanced propagation delays: tPLH ≅ tPHL\nWide operating voltage range: VCC (opr) = 2 V to ;

Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

丝印代码：74HC132；Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

丝印代码：HC132；Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M54/74HC132 is a high speed CMOSQUAD2-INPUT SCHMITT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are identical to those of the M54/74HC00.

丝印代码：74HC132Y；Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

丝印代码：HC132Y；Quad 2-input Schmitt NAND gate

Features • High-speed: tPD = 11 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C • High noise immunity: VH(typ) = 0.9 V at VCC = 5 V • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating volta

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC GATE NAND SCHMIT 4CH 2IN 14SO 集成电路（IC） 门和反相器

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC GATE NAND 4CH 2-INP 14TSSOP 集成电路（IC） 门和反相器

Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc