Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS HIGH-PERFORMANCE SILICON-GATE CMOS

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High–Performance Silicon–Gate CMOS TheMC54/74HC132A is identical in pinout to the LS132. The device inputsare compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. TheHC132A can be used to

四路 2 输入 NAND 门极，带施密特触发器输入

High-Performance Silicon-Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveform • Output Drive Capability: 10 LSTTL Loads\n• Outputs Directly Interface to CMOS, NMOS, and TTL\n• Operating Voltage Range: 2.0 to 6.0 V\n• Low Input Current: 1.0 mA\n• High Noise Immunity Characteristic of CMOS Devices\n• In Compliance with the Requirements Defined by JEDEC Standard No. 7A\n• Chip C;

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS HIGH-PERFORMANCE SILICON-GATE CMOS

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High–Performance Silicon–Gate CMOS TheMC54/74HC132A is identical in pinout to the LS132. The device inputsare compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. TheHC132A can be used to

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High?뭁erformance Silicon?묰ate CMOS

The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features • Output Dri

QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS HIGH-PERFORMANCE SILICON-GATE CMOS

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High–Performance Silicon–Gate CMOS TheMC54/74HC132A is identical in pinout to the LS132. The device inputsare compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. TheHC132A can be used to

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NAND 4CH 2-INP 14SOIC 集成电路（IC） 门和反相器

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND 4CH 2-INP 14TSSOP 集成电路（IC） 门和反相器

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2?묲nput NAND Gate with Schmitt?뭈rigger Inputs High?뭁erformance Silicon?묰ate CMOS

文件：115.86 Kbytes Page：10 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

文件：145.6 Kbytes Page：9 Pages

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhanc

Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable