QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M54/74HC125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED PRO

Quad bus buffer (3-state)

Features • High-speed: tPD = 8 ns (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C • High noise immunity: VNIH = VNIL = 28 % VCC (min) • Symmetrical output impedance: |IOH| = IOL = 6 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER NON-INVERT 6V 14TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Quad buffer/line driver; 3-state

1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to i

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICCcategory: MSI

Quad buffer/line driver; 3-state

1. General description The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to i

QUADRUPLE 3-STATE BUFFERS OE HIGH

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