位置：首页 > IC中文资料第11208页 > M74HC107
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
M74HC107 | DUAL J-K FLIP FLOP WITH CLEAR 文件：248.85 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 |   | |
DUAL J-K FLIP FLOP WITH CLEAR 文件：248.85 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
DUAL J-K FLIP FLOP WITH CLEAR 文件：248.85 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
DUAL J-K FLIP FLOP WITH CLEAR 文件：248.85 Kbytes Page：11 Pages | STMICROELECTRONICS 意法半导体 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | |
M74HC107产品属性
- 类型
描述
- 型号
M74HC107
- 制造商
STMICROELECTRONICS
- 制造商全称
STMicroelectronics
- 功能描述
DUAL J-K FLIP FLOP WITH CLEAR
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ST/意法 |
24+ |
DIP14 |
22055 |
郑重承诺只做原装进口现货 |
|||
ST |
2019 |
原厂原装 |
1416 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
STMicroelectronics |
2000 |
SOP-14 |
1350 |
原装现货海量库存欢迎咨询 |
|||
ST/意法 |
24+ |
NA |
990000 |
明嘉莱只做原装正品现货 |
|||
STM |
24+ |
3550 |
|||||
ST |
23+ |
原厂原装 |
50000 |
全新原装正品现货,支持订货 |
|||
ST |
25+ |
标准封装 |
18000 |
原厂直接发货进口原装 |
|||
ST |
DIP |
3200 |
原装长期供货! |
||||
ST/意法 |
23+ |
13000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
||||
ST/意法 |
23+ |
DIP14 |
50000 |
全新原装正品现货,支持订货 |
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M74HC107规格书下载地址
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2019-12-14
DdatasheetPDF页码索引
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