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74HC107N价格
参考价格：￥3.2963
型号：74HC107N,652 品牌：Philips Semiconducto 备注：这里有74HC107N多少钱，2025年最近7天走势，今日出价，今日竞价，74HC107N批发/采购报价，74HC107N行情走势销售排行榜，74HC107N报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74HC107N | Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 |   | |
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | ||
封装/外壳：14-DIP（0.300"，7.62mm） 功能：复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 14DIP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | |
74HC107N产品属性
- 类型
描述
- 型号
74HC107N
- 制造商
NXP Semiconductors
- 功能描述
Flip Flop JK-Type Neg-Edge 2-Element 14-Pin PDIP
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
PHI |
23+ |
DIP |
9856 |
原装正品,假一罚百! |
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PHI |
24+ |
DIP |
2500 |
只做原装正品现货 欢迎来电查询15919825718 |
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PHI |
24+ |
DIP |
990000 |
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恩XP |
25+ |
SOT27 |
188600 |
全新原厂原装正品现货 欢迎咨询 |
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恩XP |
2016+ |
TSOP |
2600 |
只做原装,假一罚十,公司可开17%增值税发票! |
|||
ph |
24+ |
N/A |
6980 |
原装现货,可开13%税票 |
|||
PHI |
24+ |
DIP |
329 |
||||
PHI |
17+ |
DIP |
6200 |
100%原装正品现货 |
|||
HIT |
24+ |
DIP |
5000 |
原装进口现货假一赔十 |
|||
恩XP |
23+ |
原包装原封□□ |
78786 |
原装进口特价供应特价，原装元器件供应，支持开发样品更多详细咨询库存 |
74HC107N规格书下载地址
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2020-7-30
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