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74HC107D价格
参考价格：￥0.8528
型号：74HC107D,652 品牌：NXP 备注：这里有74HC107D多少钱，2026年最近7天走势，今日出价，今日竞价，74HC107D批发/采购报价，74HC107D行情走势销售排行榜，74HC107D报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74HC107D | Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 |   | |
74HC107D | Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | |
74HC107D | Dual JK flip-flop with reset; negative-edge trigger | NEXPERIA 安世 | | |
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J | NEXPERIA 安世 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger 1. General description The 74HC107-Q100; 74HCT107-Q100 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock inp | NEXPERIA 安世 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 14SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Dual JK flip-flop with reset; negative-edge trigger | NEXPERIA 安世 | | ||
封装/外壳：14-SSOP（0.209"，5.30mm 宽） 功能：复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 14SSOP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Dual JK flip-flop with reset; negative-edge trigger 文件：747.99 Kbytes Page：17 Pages | NEXPERIA 安世 | | ||
Dual JK flip-flop with reset; negative-edge trigger | NEXPERIA 安世 | |
74HC107D产品属性
- 类型
描述
- 型号
74HC107D
- 功能描述
触发器 DUAL J-K W/NEG-EDGE TRIG
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
恩XP |
25+ |
SOP |
32000 |
NXP/恩智浦全新特价74HC107D即刻询购立享优惠#长期有货 |
|||
PHIL |
24+/25+ |
50 |
原装正品现货库存价优 |
||||
Nexperia |
25+ |
N/A |
20000 |
||||
PHI |
24+ |
SOP3.9MM |
30 |
只做原装正品现货 欢迎来电查询15919825718 |
|||
恩XP |
24+ |
SO-16 |
10000 |
十年沉淀唯有原装 |
|||
恩XP |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
|||
恩XP |
23+ |
9865 |
原装正品,假一赔十 |
||||
PHI |
25+ |
SOP3.9 |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
PHI |
SOP3.9mm |
86520 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
恩XP |
2223+ |
SOP14 |
26800 |
只做原装正品假一赔十为客户做到零风险 |
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74HC107D规格书下载地址
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