Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

CDx4HCT74 Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

Dual D Flip-Flop with Set and Reset Positive-Edge Trigger

文件：276.3 Kbytes Page：12 Pages

Dual D Flip-Flop with Set and Reset

文件：628.26 Kbytes Page：17 Pages

Dual D Flip-Flop with Set and Reset Positive-Edge Trigger

文件：276.3 Kbytes Page：12 Pages

Dual D Flip-Flop with Set and Reset

文件：628.26 Kbytes Page：17 Pages