TRIPLE 3-INPUT AND GATE

Description The M54HCxxx and M54HCTxxx series are composed of over 90 types of high speed CMOS functions specifically designed to meet the radiation requirements of the aerospace industry. It includes a large set of gates, Flip-Flops, Multiplexers, Counters, Bus interface and several other functi

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

抗辐照三路3输入与门

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs ar

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs ar

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

DUAL J-K FLIP FLOP WITH PRESET

DESCRIPTION The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■

TRIPLE 3-INPUT AND GATE

Description The M54HCxxx and M54HCTxxx series are composed of over 90 types of high speed CMOS functions specifically designed to meet the radiation requirements of the aerospace industry. It includes a large set of gates, Flip-Flops, Multiplexers, Counters, Bus interface and several other functi

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

文件：254.42 Kbytes Page：11 Pages

DUAL J-K FLIP FLOP WITH PRESET

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

RAD-HARD TRIPLE 3-INPUT AND GATE

文件：105.35 Kbytes Page：8 Pages

High Speed CMOS Logic Triple 3-Input AND Gate

文件：33.84 Kbytes Page：6 Pages

High Speed CMOS Logic Triple 3-Input AND Gate

文件：33.84 Kbytes Page：6 Pages

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：518.94 Kbytes Page：15 Pages

TRIPLE 3-INPUT POSITIVE-AND GATES

文件：518.94 Kbytes Page：15 Pages