位置：首页 > IC中文资料第938页 > CD54HC11
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD54HC11 | CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si | TI 德州仪器 |   | |
CD54HC11 | 军用 3 通道、3 输入、2V 至 6V 与门 | TI 德州仪器 | | |
CD54HC11 | High-Speed CMOS Logic Triple 3-Input AND Gate 文件：616 Kbytes Page：15 Pages | TI 德州仪器 | | |
CD54HC11 | High Speed CMOS Logic Triple 3-Input AND Gate 文件：33.84 Kbytes Page：6 Pages | TI 德州仪器 | | |
CD54HC11 | High-Speed CMOS Logic Triple 3-Input AND Gate 文件：260.86 Kbytes Page：11 Pages | TI 德州仪器 | | |
CD54HC11 | High-Speed CMOS Logic Triple 3-Input AND Gate 文件：440.26 Kbytes Page：13 Pages | TI 德州仪器 | | |
CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output | TI 德州仪器 | | ||
CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output | TI 德州仪器 | | ||
CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output | TI 德州仪器 | | ||
CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si | TI 德州仪器 | | ||
CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si | TI 德州仪器 | | ||
CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si | TI 德州仪器 | | ||
CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：260.86 Kbytes Page：11 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：440.26 Kbytes Page：13 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：616 Kbytes Page：15 Pages | TI 德州仪器 | | ||
具有设置与复位端的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器 | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages | TI 德州仪器 | | ||
Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：260.86 Kbytes Page：11 Pages | TI 德州仪器 | | ||
High Speed CMOS Logic Triple 3-Input AND Gate 文件：33.84 Kbytes Page：6 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：616 Kbytes Page：15 Pages | TI 德州仪器 | | ||
High Speed CMOS Logic Triple 3-Input AND Gate 文件：33.84 Kbytes Page：6 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：260.86 Kbytes Page：11 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：616 Kbytes Page：15 Pages | TI 德州仪器 | | ||
High-Speed CMOS Logic Triple 3-Input AND Gate 文件：440.26 Kbytes Page：13 Pages | TI 德州仪器 | |
CD54HC11产品属性
- 类型
描述
- 型号
CD54HC11
- 制造商
Texas Instruments
- 制造商
Harris Corporation
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
24+ |
350 |
|||||
HARRIS |
24+/25+ |
14 |
原装正品现货库存价优 |
||||
HARRIS |
25+ |
DIP14 |
10 |
原装正品,假一罚十! |
|||
TI |
2511 |
3200 |
电子元器件采购降本 30%!盈慧通原厂直采,砍掉中间差价 |
||||
HARRIS |
9219 |
DIP14 |
10 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
24+ |
TSSOP8 |
6000 |
美国德州仪器TEXASINSTRUMENTS原厂代理辉华拓展内地现 |
||||
HARRIS |
97+ |
CDIP-16 |
47 |
原装现货海量库存欢迎咨询 |
|||
TI/德州仪器 |
24+ |
N/A |
20000 |
原厂直供原装正品 |
|||
HARRIS |
22+ |
DIP14 |
6000 |
十年配单,只做原装 |
|||
TI |
1824+ |
CDIP |
2705 |
原装现货专业代理,可以代拷程序 |
CD54HC11规格书下载地址
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