Numonyx® Embedded Flash Memory (J3 65nm) Single Bit per Cell (SBC)

Features Architecture — Symmetrical 128-KB blocks — 128 Mbit (128 blocks) — 64 Mbit (64 blocks) — 32 Mbit (32 blocks) — Blank Check to verify an erased block Performance — Initial Access Speed: 75ns — 25 ns 8-word Asynchronous page-mode reads — 256-Word write buffer for x16 mode, 256-

Numonyx짰 Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)

Introduction This document contains information pertaining to the Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC) device features, operation, and specifications. Unless otherwise indicated throughout the rest of this document, the Numonyx® Embedded Flash Memory (J3 65 nm) Sin

封装/外壳：56-TFSOP（0.724"，18.40mm 宽） 包装：卷带（TR） 描述：IC FLASH 64MBIT PARALLEL 56TSOP 集成电路（IC） 存储器

Micron J3/P30/P33 Parallel NOR

PARALLEL 64M X16 TSOP

封装/外壳：56-TFSOP（0.724"，18.40mm 宽） 包装：托盘 描述：IC FLASH 64MBIT PARALLEL 56TSOP 集成电路（IC） 存储器

Parallel NOR Flash

Q-FLASHTM MEMORY

GENERAL DESCRIPTION The MT28F128J3 is a nonvolatile, electrically block erasable (Flash), programmable memory containing 134,217,728 bits organized as 16,777,218 bytes (8 bits) or 8,388,608 words (16 bits). This 128Mb device is organized as one hundred twenty-eight 128KB erase blocks. The MT28F64

Intel StrataFlash Memory (J3)

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