型号 功能描述 生产厂家 企业 LOGO 操作
IS61LF51236B

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

IS61LF51236B

Synchronous SRAM

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

封装/外壳:100-LQFP 包装:卷带(TR) 描述:IC SRAM 18MBIT PARALLEL 100LQFP 集成电路(IC) 存储器

ETC

知名厂家

封装/外壳:165-TBGA 包装:散装 描述:IC SRAM 18MBIT PARALLEL 165TFBGA 集成电路(IC) 存储器

ETC

知名厂家

256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs a

ISSI

矽成半导体

256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

文件:276.75 Kbytes Page:35 Pages

ISSI

矽成半导体

更新时间:2025-11-23 11:10:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ISSI
23+
10000
原厂授权一级代理,专业海外优势订货,价格优势、品种
ISSI(美国芯成)
2447
LQFP-100(14x20)
315000
72个/托盘一级代理专营品牌!原装正品,优势现货,长
ISSI,
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
ISSI
25+
电联咨询
7800
公司现货,提供拆样技术支持
ISSI Integrated Silicon Soluti
22+
100LQFP (14x20)
9000
原厂渠道,现货配单
ISSI
2405+
n/a
9845
十年芯路!诚信赢客户!合作创未来!
ISSI, Integrated Silicon Solut
24+
100-LQFP(14x20)
56200
一级代理/放心采购
ISSI
19+
*
72
ISSI
24+
n/a
25836
新到现货,只做原装进口
ISSI
25+
BGA119
3850
百分百原装正品 真实公司现货库存 本公司只做原装 可

IS61LF51236B数据表相关新闻